As shown in FIG. 1, a conventional sampling head, for example as used in a digital oscilloscope, comprises a travelling wave sampler 2 which is connected to a signal input terminal 4 and receives strobe pulses from a strobe generator 6. The strobe generator generates strobe pulses in response to a strobe drive signal, and on each strobe pulse a sampling gate of the travelling wave sampler is rendered conductive and signal charge is allowed to accumulate on balanced delay lines of the sampler. At the end of the strobe pulse the sampling gate is rendered non-conductive and signal charge that accumulated on the delay lines is trapped. The signal charge that is trapped on the delay lines has a common mode component that is related to the voltage of the input signal, and the common mode charge is applied to an error amplifier 8. The output terminal of the amplifier 8 is connected to apply positive feedback to the bias network 10 for the sampler through a memory gate 12. The memory gate includes a memory capacitor and a switch that controls charging of the memory capacitor by the output signal of the amplifier 8 in dependence on the state of a gate control signal that it receives from the strobe generator 6. The gate control signal comprises a succession of gate control pulses, and the memory gate switch is conductive during each memory gate pulse. The leading edge of the memory gate pulse is synchronous with the strobe pulse. The positive feedback adjusts the level at which bias is applied to the sampler, so that immediately following each strobe pulse the amplifier 8 provides an output voltage that represents the difference between the input signal voltage at a sampling point and the input signal voltage at the previous sampling point. This output voltage is applied to the output terminal 14 of the sampling head. At the end of the memory gate pulse, the memory gate switch becomes non-conductive and breaks the positive feedback loop.
In the conventional memory gate, the memory gate switch responds to difference between the voltage of the gate control signal and the voltage stored on the memory gate capacitor, and accordingly the voltage amplitude of the memory gate pulse limits the dynamic range of the error signal that can be accurately transferred from the amplifier 8 to the output terminal 14 of the sampling head. Moreover, the duty cycle of the memory gate switch depends on the voltage on the memory gate capacitor, and this results in a non-linear transfer function relating the output voltage of the amplifier to the output voltage of the sampling head. Feedthrough of the gate control signal into the signal path influences the quantity of the charge stored on the memory gate capacitor.